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Tuesday, May 17, 2011

XDR™2 Memory Architecture


Designed for scalability, power efficiency and manufacturability, the XDR 2 architecture is a complete memory solution ideally suited for high-performance gaming, graphics and multi-core compute applications. Each XDR 2 DRAM can deliver up to 80GB/s of peak bandwidth from a single, 4-byte-wide, 20Gbps XDR 2 DRAM device. With this capability, systems can achieve memory bandwidth of over 500GB/s on a single SoC.
Capable of data rates up to 20Gbps, the XDR 2 architecture is part of the award-winning family of XDR products. With backwards compatibility to XDR DRAM and single-ended industry-standard memories, the XDR 2 architecture is part of a continuously compatible roadmap, offering a path for both performance upgrades and system cost reductions.
The XDR 2 memory architecture is the first to incorporate innovations from Rambus' Terabyte Bandwidth Initiative along with other key Rambus innovations including:
  • 32X Data Rate enables high data rates (up to 20Gbps) at lower system clock and on-chip bus interface speeds.
  • Fully Differential Memory Architecture (FDMA) improves signal integrity, reduces power and enables the highest memory performance available.
  • Enhanced FlexPhase™ enables high data rates, simplifies layout and eliminates trace length matching.
  • FlexLink™ C/A reduces system costs and controller pin-count while providing scalable capacity and flexible access granularity.
  • FlexMode™ interface technology enables support of both differential and single-ended memories in a single SoC package design with no extra pins.
  • Micro-threading increases transfer efficiency on micro-threaded workloads while reducing power consumption.

Source : www.rambus.com

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